Lattice Semiconductor
Convolutional Encoder User’s Guide
Introduction
Lattice’s Convolutional Encoder core is a parameterizable core for convolutional encoding of a continuous input
data stream. The core allows variable code rates, constraint lengths and generator polynomials. The core also sup-
ports puncturing. Puncturing enables a large range of transmission rates and reduces the bandwidth requirement
on the channel. The architectural details of the core are given in the Convolutional Encoder Core Description sec-
tion.
Convolutional Encoder Basics
Figure 1 shows a digital transmit-receive system using the convolutional encoder. The digital data stream (such as
voice, image or any packetized data) is ?rst convolutionally encoded, then modulated and ?nally transmitted
through a channel. The noise block in Figure 1 represents channel noise added to the channel. The data received
from the channel at the receiver side is ?rst demodulated and then decoded using a Viterbi decoder. The decoded
output is equivalent to the original transmitted data stream.
Figure 1. Digital Transmit-Receive System
Transmitted
Data Stream
Convolutional
Encoder
Modulator
Channel
Demodulator
Viterbi
Decoder
Received
Data Stream
Noise
Convolutional Coding
Convolutional encoding is a process of adding redundancy to a signal stream. Figure 2 shows an example of 1/2
rate convolutional encoding.
Figure 2. Convolutional Encoding
data in
D
Q
D
Q
data out
1/2 convolutional coding with constraint length = 3
and generator polynomials 111 and 101
In this example, each input symbol has two corresponding output symbols, hence the encoding is called 1/2 rate
convolutional encoding. To generate the output, the encoder uses three values of the input signal, one present and
two past. The set of past values of input data is called a “state”. The number of input data values used to generate
the code is called the constraint length. In this case, the constraint length is three. Each set of outputs is generated
by XORing a pattern of current and shifted values of input data. The patterns used to generate the coded output
value can be expressed as binary strings called generator polynomials (GP). In this example, the generator polyno-
mials are 111 and 101. The MSB of the GP corresponds to the input; the LSBs of the generator polynomial corre-
spond to the state as shown in Figure 2. A bit value of ‘1’ in the generator polynomial represents a used XOR bit
and a value of ‘0’ signi?es an unused bit.
2
相关PDF资料
CORE10/100-AR IP CORE10/100 UNLIMITED RTL
CORE1553BBC-AR IP MODULE CORE1553 BUS CTLR
CORE1553BRT-AR IP MODULE CORE1553 REMOTE TERM
CORE8051-AR IP MODULE CORE8051
COREFFT-RM IP MODULE COREFFT
COREFIR-RM IP MODULE COREFIR
COREPCIF-RM IP MODULE COREPCIF
COREU1LL-AR IP MODULE COREU1LL
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